a. Field of Invention
The invention relates to the equipment and process for testing the capacity of a global positioning system (GPS) receiver to lock on to the transmitted signal of a particular satellite and properly process the signal.
b. Background of the Invention
The Global Positioning Satellite (GPS) system is widely used by civilian and military personnel to obtain a precise determination of position on or near the surface of the earth. The system is comprised of a constellation of satellites in earth orbit and positioned such that a sufficient number of satellites (typically 4) will be in range to communicate on a line of sight path with a receiving unit anywhere on the surface of the earth. The constellation of satellites is monitored and maintained from a number of earth based stations. The earth based stations send data to the satellites, to be stored and subsequently transmitted to GPS receivers, as needed. The information includes the satellites"" orbital elements, almanac information containing abbreviated orbital elements, ranging measurement corrections and status flags. A user of the GPS must establish communication between his or her receiver and a sufficient number of satellites with up-to-date data and in working order. The receiver must receive the satellite communications including time of transmission and navigation data message, and triangulate the position of the receiver by solving the position equation. Although the system is generally reliable, it depends on the proper functioning of multiple satellites in earth orbit as well as the proper functioning of the receiver.
The primary signal transmitted by the satellites is known as L-1 and is a biphase shift keying modulator modulated with a 1.023 MHz pseudo random noise coarse acquisition code. The coarse acquisition code repeats once each millisecond. The GPS receiver demodulates the received code from the L-1 carrier and compares the transmitted coarse acquisition code with coarse acquisition codes generated by the receiver. The receiver mimics the code of each satellite until it reproduces one that matches the transmission coming from the satellite and thereby identifies the correct satellite. The system currently in use provides for 36 separate coarse acquisition codes. The coarse acquisition code is the modulo-2 sum of two 1023 bit linear patterns designated as G-1 and G-2. The G-2 pattern is selectively delayed by an integer number of chips, which number varies for each of the 36 separate and unique variations. The result is that each satellite has a unique time delay in its G-2 signal such that when the G-2 is modulo-2 added to the G-1 signal a unique one of the 36 possible coarse acquisition codes is produced.
The navigation message is a 1500 bit data word transmitted at a rate of 50 bits per second. The message contains the time of transmission, the satellite position, satellite health, satellite clock correction, propagation delay effects, time transfer to UTC and constellation status. The navigation message effectively modulates the coarse acquisition code and is transmitted along with the L-1 carrier.
In many locations such as underwater, underground or inside a metal building, a GPS satellite signal cannot be received by a GPS receiver. In order to receive the signal, the receiver must be moved to an exposed position where the signal is accessible. In military (and in some other) situations there may be a need for covert operation and the time of exposure must be minimized. It helps in this regard to know in advance that the GPS equipment is fully functional before moving to the exposed location to communicate with the satellites. This avoids downtime while exposed, but it also requires pre-testing of the equipment out of range of the satellites. The basic operation of the receiver can be tested, by known methods, but the capacity of the receiver to receive GPS data cannot be easily confirmed. The equipment which generates the satellite signals can be reproduced in the laboratory but the size of this equipment makes it impractical for use in the field.
The GPS receiver can be tested by other methods currently known in the art. There are a number of existing systems that test, calibrate, and/or otherwise assist GPS receivers in acquiring/locking onto signals from GPS satellites (e.g. shortening the time to xe2x80x9cfirst fixxe2x80x9d). For example, U.S. Pat. Nos. 6,400,314, 6,064,336, and 5,841,396 to Krasner disclose the use of a precision carrier frequency, emanating from a base station, for calibrating local oscillators (i.e. GPS receivers). The GPS receiver disclosed in U.S. Pat. No. 6,320,536 to Sasaki utilizes signals from a stationary satellite to shorten the time required to lock onto the signals from the target GPS satellite. The GPS receiver disclosed in U.S. Pat. No. 5,663,735 to Eshenbach utilizes information derived from a standard time and/or standard frequency radio signal for the purpose of pre-tuning to the carrier frequency of the target GPS satellite. Finally, U.S. Pat. No. 6,289,041 to Krasner discloses a GPS receiver that utilizes a psuedo-random noise matching filter method, requiring the processing of a plurality of GPS satellite-generated signals, to achieve both fast signal acquisition and a high degree of sensitivity. Unfortunately, none of these four apparatus incorporate a fully self-contained design . . . all require one or more signals to be received from some remote source. It would be greatly advantageous to provide a fully self-contained design for a device to test the capacity of the receiver to lock on the signal of particular satellites and to properly process their signals (xe2x80x9cself-containedxe2x80x9d meaning that the signals required to test/calibrate the operation of the GPS receiver""s outer loop antenna path are generated internally by the device).
It is an object of the invention to provide a compact, low physical profile and affordable GPS satellite emulator which can produce the L-1 signal of each of the GPS satellites within the constellation of the system.
It is an object of the invention to provide a satellite emulator which can quickly test the outer loop antenna path of a GPS receiver to confirm the capability to receive and process a GPS satellite signal.
It is a further object of the invention to provide an emulator equipped with switches to allow a user to vary the output of the emulator to match the signal of a specific satellite.
It is yet another object of the invention to provide an emulator equipped with a main oscillator having a relatively broad range of accuracy, to reduce the size and cost of the device of the present invention.
According to the present invention, the above-described and other objects are accomplished by a GPS satellite emulator that uses a single oscillator to provide a 10.23 MHz clock signal and 1.57542 GHz signal to a biphase shift keying modulator, which outputs the emulated satellite signal. The oscillator is selected to have a frequency accuracy of +/xe2x88x9210 KHz and is connected through an attenuator to the biphase shift keying modulator. The attenuator reduces the signal power of the output to xe2x88x9270 dBm. The relatively wide range of frequency accuracy allows for the selection of a relatively small sized oscillator and the attenuator reduces the signal power to a value near the typical signal strength of a satellite, which is approximately xe2x88x92120 dBm. The oscillator, attenuator and biphase shift keying modulator comprise the radio frequency components of the satellite emulator.
The GPS receiver is sufficiently sensitive to discern a signal at the power level output by the satellites and is susceptible to interference from radio frequency leakage. The present invention includes a metal case enclosing the oscillator to minimize the interference from radio frequency leakage. Additionally, the reduced power output of the satellite emulator acts to reduce the amount of radio frequency leakage interference.
The digital circuitry divides the 10.23 MHz signal by a factor of 10 to produce a 1.023 MHz clock signal which times the function of the digital circuitry of the device. The 1.023 MHz clock signal is input to a series of three cascading 4-bit counters and a flip-flop to produce a G-Epoch which repeats a pulse once for every 1023 cycles of the clock signal, to reload the circuitry for the G-1 and G-2 signals and to provide a base clock signal to output the navigation data
The device uses a 10-bit shift register, receiving input from the 1.023 MHz counter and the G-Epoch to output a G-1 signal. The G-1 signal is modulo-2 added to the G-2 signal, which is generated in a unique manner. The device uses 10-bit linear feedback shift registers, clocked and shifted out by the 1.023 MHz clock signal. The G-epoch signal reloads the shift registers which generate a 10-bit output. This output is parallel input to a pair of multiplexers, which are both decoded by an EPROM, to obtain a serial G-2 output from the multiplexers. The EPROM is encoded by a set of user set switches and a memory containing the appropriate equivalent delay count for each satellite, in the constellation. The switches can be set to encode the EPROM for the delay count of any of the satellites. The EPROM decodes the two multiplexers, to produce a G-2 serial output, which is modulo-2 added to produce the G-2 signal unique to the selected satellite. The arrangement of digital circuit elements produces the G-2 signal for any user selected satellite in the constellation, from the compact device of the present invention. The G-1 and G-2 signals are modulo-2 added according to known practice, to produce the coarse acquisition code for the selected satellite.
A navigation message is stored in a second EPROM. The device down converts the G-Epoch signal to 50 Hz to shift out the navigation message at the required rate. The navigation message is comprised of 30-bit subframes, which are stored in bytes of 8-bit segments, within the second EPROM. Every fourth byte contains two bits which are not a part of the navigation message. The device parallel out-loads 4 bytes per subframe but shifts only 30 of the bits, while maintaining the 50 Hz clock rate. A unique circuitry block clocks a counter chain and loads a shift register circuit in a patterned sequence, to count through the addresses of the second EPROM, counting 8 bits of 3 bytes and counting 6 bits of a fourth byte before loading a new subframe. The shift register circuit is clocked by the 50 Hz signal to shift out the navigation message at the clock rate and including 30 bits from each of the subframes stored in the second EPROM. A typical satellite navigation message is output at a 50 Hz frequency.
The navigation message is modulo-2 added to the coarse acquisition code and the output sum is a pseudo random noise signal, for a particular satellite, however; the combinational logic components which complete the modulo-2 addition, produce misaligned pulse edges in the pseudo random noise signal. In order to resolve the misaligned pulse edges, the signal is input to a novel glitch elimination circuit. The glitch elimination circuit receives input of the 1.023 MHz clock signal. It effectively delays the output of the pseudo random noise signal by approximately 111 nanoseconds. The delay allows the inadvertent pulses coming from the inherent misaligned logic edges, caused by the modulo-2 addition steps, to reach a settled state before being clocked through to the output. The signal is input to the biphase shift keying modulator with the 1.57542 GHz carrier and output at radio frequency in the form of the transmission from the selected satellite, as a pure GPS signal, free from glitches. The satellite emulator of the present invention is compact and suitable for use in the field.